About DXCorr

DXCorr provides the industry's leading edge physical IP solutions, available in 40nm, 28nm and 16/14nm process nodes, for a wide range of SoC designs used across a broad spectrum of performance oriented power optimized applications. The advanced Physical IP portfolio offers a comprehensive set of IPs covering Foundation IP blocks such as SRAMs, standard cells and I/Os for most of the building blocks of SoC design, specialized physical IPs -TCAMs, multiport register files, customizable datapath – that helps our customers build highly differentiated products for low power or high performance applications and custom PDK and PCELL development for Mixed Signal IC design.
From complex ASIC solutions to hardening of SoC cores, DXCorr also offers the highest quality design service enabling our customers achieve significant time-to-market and performance advantage in the most cost-effective manner.

DXCorr: A Complete SoC Ecosystem Provider

soc eco system

Superior in Physical IP development - Expertise in Memory Compilers

Physical IP

Superior in Physical IP

Every powerful chip design is built on a foundation of physical IP, a foundation that directly impacts the finished chip's performance, power, area and yield. At DXCorr, we understand the critical connection between the quality of your IC designs and the underlying physical IP. Our goal is to ensure that your designs are the best in the industry and that requires starting with a foundation based on the best IP available.

Physical IP

We are the industry's most skilled independent physical IP supplier that delivers carefully crafted high quality physical building blocks to the most advanced chip design teams. While other IP vendors provide generic "one size fits all" solutions, we believe that your IP should be as unique as your design and we build exactly what you need to compete and win in your market.


With extensive experience in memory design services coupled with a strong background in development of memory products we are strong in development of High performance and High Density SRAM's. SRAM Low power features and techniques are Power gating, slack based power optimization, Unique low power architectures for low voltage operation. Few of Multiple power modes supported in SRAMs are Deep sleep mode, Standby, Power down. Extensive Standard feature-set supported in SRAMs

  • Integrated BIST and Scan hooks
  • Aspect ratio control
  • Top level metal choice
  • Pipelined output
  • Design margin bits
  • Write assist
  • Write through
  • Row/Col redundancy
  • Full CCS modeling supported
  • TCAM & CAM

    In a world seeking faster networks and more efficient processors, expertly designed CAMs provide a significant competitive advantage.
    DXCorr's engineers are CAM specialists, providing, power-efficient, high-speed binary and ternary CAMs.
    Our CAMs are far from generic solutions. We match each CAMs? functionality, performance, power and area to the precise requirements of your design.

    Standard Cell Libraries

    Just because Standard Cells are common building blocks doesn't mean that they have to be generic.
    DXCorr provides standard cell solutions that make your designs stand out. We provide highly targeted solutions to meet your unique power and performance requirements or we can analyze your current performance issues and augment your existing library with a set of "kicker" cells for a significant and easy performance and power improvement.

    Custom PDK and PCell

    High-quality PCells and PDKs can significantly reduce design time and errors. Unfortunately developing a complete solution is resource intensive and requires specialized expertise.
    DXCorr's automated PCell generation approach is based on decades of full custom design experience and can be used to guarantee correct-by-construction design.

    Register Files

    Your competitors all use memories from the same few vendors. It's no surprise that their designs all look alike and share power, performance and area characteristics.
    Now there is a way to avoid this trap and exceed the capabilities of common IP. DXCorr's memories are optimized for high-performance with added power-saving features.
    We enable your designs to perform like your designs, not like everybody else's.

    Driven by the industry's most skilled and experienced professionals.

    Meet Our Executive Team

    Mike Noonen Advisor

    Mike is the co-founder of Silicon Catalyst, the world’s first semiconductor-focused start-up incubator based in Silicon Valley. Mike is also a director of Adapteva and Ambiq Micro. Previously, Noonen was Executive Vice President, Global Products, Design, Sales, & Marketing at GlobalFoundries. He also served on the Global Semiconductor Alliance Board of Directors. Noonen has held executive roles at NXP Semiconductors, National Semiconductor and Cisco Systems. Overall 25 years of experience of technology product management and sales and marketing organizational leadership.

    Nirmalya Ghosh CEO

    Nirmalya led the Artisan/ARM memory team from 2001 through 2008. Under his leadership the team grew significantly along with strong growth in revenue and market position. He served as the Engineering Director of ARM’s Physical IP memory team following its acquisition of Artisan Components. Before moving to Artisan he held management positions in Duet Technologies.

    Sagar ReddyCTO and Founder

    Sagar co-founded DXCorr in 2005. The company closed its first deal with Montalvo and delivered mission critical cache blocks. Montalvo’s chip with DXCorr memories went into fabrication with early silicon success. Sagar is a high-profile circuit designer with a strong interest in design automation. Before founding DXCorr, he held engineering positions with Silicon Graphics, AMD and SUN.

    R. ChandramouliDirector of Marketing

    “Mouli” Chandramouli held senior level marketing positions over a seven year period at the Physical IP Division of ARM and earlier at Virage Logic, driving leading-edge memory IP products from concept to market. Prior to that Mouli held a variety of product marketing positions for over ten years at Logic Vision and Synopsys. He is a senior member of the IEEE and an active member of the IEEE memory CTL standards group. Mouli received a Ph.D. in electrical engineering from Oregon State University.

    Danngis Liu VP of Silicon Technology

    "Danngis" has more than 30 years of experience in the semiconductor industries covered areas in device and process R&D, analog&digital product and IP development. Danngis held senior management positions in IMP, Catalyst Semiconductor, Artisan, Innovative Silicon and ARM before joining DXCorr. Danngis built and managed many teams in multiple disciplines and one of them was operated as a business unit with substantial revenue. Danngis received a MSEE degree from Stanford University.

    DXCorr Design Services

    With Passion & Experience

    Every design is different. Sometimes all of your needs can be met by standard building blocks. But from time to time, you need something really unique to differentiate your design from the competition. DXCorr looks forward to discussing your custom requirements. Our team of hard working engineers will work with you to deliver the most competitive design, be it the most complex ASIC design, or a complex graphics or a processor core, to be hardened in the latest process technology. The combination of our highly optimized physical IP, specific custom block or cell and our expert physical design teams will give you exceptional results. Contact us and we will help you build the greatest product that wins the market.

    Product Time Line

    product roadmap

    Front End

    I. RTL Design and Design Verification

    II. Process Migration and Cost Reduction

    III. Physical IP selection and Trade-Off Analysis

    IV. Logic Synthesis

    V. DFT Insertion [Mentor] and Verification

    VI. Chip Partitioning

    Back End

    I. Floorplanning

    II. Clock and Power Planning

    III. Timing Constraints Generation

    IV. Place-and-Route and Timing Closure

    V. Clock Tree Synthesis

    Chip Finishing Services

    I. Chip Finishing and Quality Control

    II. IR Drop and EM Analysis

    III. Routing and Signal Integrity Closure

    IV. Sign-off Extraction and Timing and Noise Verification

    V. Physical Verification (LVS, DRC and Antenna)

    VI. DFM and Parametric Yield Improvement

    VII. Full Chip Tape-Out

    News & Events

    What's happening with DXCorr around the world

    DXCorr selected in 20 Most Promising Semiconductor Companies 2017


    DXCorr is part of GF 22FDX ecosystem


    Growing Ecosystem for 22FDX

    DXCorr's presence in a common IP forum

    Career Opportunities

    Many Opportunities awaits you at DXCorr

    Whatever your career goals may be DXCorr offers the opportunities to work with advanced technologies, most innovative and to work with the most talented minds in the Industry.

    Send your resume to

    We are presently hiring for the following positions (multiple openings including senior positions):

    Job Description: We are currently looking for Physical design engineers with excellent hands on static timing analysis experience. Responsibilities include ownership of all aspects of physical design and verification at block and top levels in addition to development, support and maintenance of physical design flows and methodologies.
    Skill set: Hands on experience in ICC and primetime
    Good scripting knowledge in TCL, SHELL and Phyton
    Experience in doing SoC level timing analysis
    Constraint generation and checking
    Experience:  1 to 10+ years
    Job location: Bangalore,India
    Please send your resumes to with job code 006.

    Job Description: We are looking for a systems administrator to help build out, maintain, and troubleshoot our rapidly expanding infrastructure. You will be part of a talented team of engineers that demonstrate superb technical competency, delivering mission critical infrastructure and ensuring the highest levels of availability, performance and security.
    Responsibilities: Installing and configuring computer hardware operating systems and applications. Monitoring and maintaining computer systems and networks. Troubleshooting system and network problems and diagnosing and solving hardware/software faults.
    Requirement/Skill set: Solid knowledge of linux (Redhat,centos,ubuntu) & installing/Configuring LDAP,DNS,NFS,FTP,DHCP,PXE. knowledge of router and switch configuration. solid scripting skills Bash,PHP,Python. knowledge of C & web programming.
    Experience:  0-2 years
    Job location: Bangalore,India
    Please send your resumes to with job code 002.

    Job Description: Experience of designing blocks & sub-systems like Linear and Switching regulator, PLLs, ADCs, DACs, LVDS, Switched Capacitor Circuits, VCOs, OpAmps, Comparators, Voltage References oscillator, SerDes etc. Perform analog circuit design, schematic entry, circuit simulation, mixed-signals integration Experience of designs in 28nm,40nm, 65nm, 90nm, 130nm, 0.18um, CMOS technologies. - Experience of using EDA tools.
    Qualification/Eligibility:  BE/B.Tech/M.Tech in Electronics and Communication Engineering/VLSI Design.
    Experience: 2+ years
    Job location: Bangalore,India
    Please send your resumes to with job code 005.

    Job Description: Must have hands-on experience and knowledge of different LPDDR SRAM techniques with respect to attributes like Data Rate (per pin), Density, Interface, Command/Address Bus, Data Bus, Voltage (VDD1/2/CA/Q), I/O Organization, Number of Banks, Pre-fetch, Burst Length, CA ODT, DQ ODT, Package Types etc.. have understanding of memory architectures, critical paths in design, mis-match margin simulations and characterization flows and tools for process nodes 28nm and 45nm; must have good understanding in generating timing views, validation of data and QA process for release; working experience with characterization tools (e.g. Altos and SiliconSmart) and with Spice simulators (e.g. HSPICE and HSIM and Ultrasim); should have understanding of circuit design concepts for low power CMOS circuits. LPDDR4, LPDDR3 experience highly desirable.
    Qualification/Eligibility:  BE/B.Tech/M.Tech in Electronics and Communication Engineering/VLSI Design.
    Experience: 2+ years (Promising freshers are welcome)
    Job location: Bangalore,India
    Please send your resumes to with job code 004.

    Job Description: We are looking for experienced C++ developer responsible for building EDA applications. Should exhibit advanced level of skill in C,C++. 
    Qualification/Eligibility:  BE/B.Tech/M.Tech
    Experience: 1+ years
    Responsibilities & Skills Required:Candidate must have good hands on C/C++, deep knowledge of data structures and algorithms, problem solving skills and good communication skills. The candidate will be responsible for writing module codes. Candidate should possess excellent logical skills to design efficient code, should work with other technology teams.
    Job location: Bangalore,India
    Please send your resumes to with job code 003.

    Job Role: DXCorr Inviting applications from the fresh Graduates/Postgrauates for VLSI Engineer position.
    Qualification/Eligibility:  BE/B.Tech/M.Tech freshers in Electronics and Communication Engineering/VLSI Design.
    Experience:  Exposure in the VLSI area (Course in VLSI and Internship) would be desirable.
    Job location: Bangalore,India
    Please send your resumes to with job code 001.

    Job Description: Must have hands-on experience and knowledge of SRAM compiler or custom memory characterization; to have understanding of memory architectures, critical paths in design, mis-match margin simulations and characterization flows and tools for process nodes 28nm and 45nm; must have good understanding in generating timing views, validation of data and QA process for release; working experience with characterization tools (e.g. Altos and SiliconSmart) and with Spice simulators (e.g. HSPICE and HSIM and Ultrasim); should have understanding of circuit design concepts for low power CMOS circuits; must have good understanding of layout design of memories; preferable to have good knowledge of scripting languages Perl, skill and shell; to have good communication skills, both verbal and oral.
    Experience:  2+ years (promising freshers are welcome) 
    Job location: Bangalore,India

    Job Description: Must have experience in layout design of memory leaf cells and at top level of memories; should have worked on 65nm / 45nm / 28nm process technologies and have understanding of issues like WPE (Well Proximity Effects), LOD (Length of Diffusion) effects; must have good understanding of physical verification checks DRC, LVS, ERC and reliability checks IR and EM; must have worked on cadence Virtuoso for layout design and Calibre for physical verification checks; must have good understanding of basics of CMOS circuits; basic knowledge of skill would be of added advantage. 
    Experience: 2+ years (promising freshers are welcome)
    Job location: Bangalore,India

    Job Description: Responsible for all flow from netlist to GDSII on chip; experience in the P&R flow and did all stage of P&R (from floorplan to extraction); must have background in synthesis, STA 
    Experience: 2+ years (promising freshers are welcome)
    Job location: Bangalore,India

    If you have the right attitude, aptitude, qualification and skill set do write to us at We look forward to hearing from you and will be in touch if there are suitable positions that match your qualifications and experience. We thank you in advance for considering dxcorr to be a part of your future.

    Work and Life @ DXCorr

    People and culture make DXCorr a great place to work. Each person is unique and valued for that individuality. Our culture is about inclusion, collaboration, high performance, and opportunity.

    Young Entrepreneur of the Year @ DXCorr CEO DXCorr Team DXCorr Team DXCorr Team @ Japan DXCorr Team @ DAC DXCorr Team @ Japan DXCorr Team @ Japan DXCorr Team @ Japan Holi 2017 @ DXCorr Holi 2017 @ DXCorr Recruitment drive at IIEST Holi @ DXCorr DXCorr Team Outing Xmas-tree @ DXCorr Sunnyvale office street view

    "Coming together is beginning- Staying together is progress- Working together is success"

    Contact Us

    We would really love to hear from you

    Corporate Headquarters

    DXCorr Design Inc.
    Suite #214
    121, West Washington Avenue
    Sunnyvale, CA - 94086
    Ph: (408) 623-3395

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    Shipping Address:
    DXCorr Design Inc.
    830 Stewart Dr,
    Sunnyvale, CA - 94085

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    India Headquarters

    DXCorr Hardware Technologies Pvt. Ltd.
    #No. 45, Sri Sai complex
    Bhoopsandra Main road
    RMV 2nd stage
    Bangalore - 560094.
    Ph: +91(80)23518494

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    DXCorr Design Inc.
    6-13-19, Sodegaura, Narashino-shi
    Chiba, 275-0021
    Phone: +81-90-4742-3648